1 adaptive digital dc/dc controller with current sharing zl2004-01 the zl2004-01 is specialized version of the zl2004 dc/dc controller that has been optimi zed for high output accuracy within a given set of operating conditions. the zl2004-01 is otherwise identical to the zl2004 in features and functionality. the zl2004-01 has been optimi zed for use with the zl1505 mosfet driver and discrete mosfets. the zl2004-01 integrates a proprietary digital-dc communication bus for current sharing and inter device communication. adaptive algo rithms improve light load efficiency. all operating features can be configured by simple pin- strap selection, resistor selectio n or through the on-board serial port. the pmbus?-compliant zl2 004-01 uses the smbus? serial interface for communication with other digital-dc products or a host controller. related literature ?see fn6846 , zl2004 ?adaptive digital dc-dc controller with current sharing? features ?power conversion ? efficient synchronous buck controller ? 0.2% vout set-point accuracy ? 8.0v to 10.0v input range ?0.9v to 1.1v output range ? adaptive performance op timization algorithms ? fast load transient response ? active current sharing ? dcr current sensing with digitall y adjustable current sense range ? rohs compliant (5mmx5mm) qfn package ? power management ? digital soft-start/stop ? precision delay and ramp-up ? power-good/enable ? voltage tracking, sequ encing and margining ? voltage/current/temperature monitoring ? smbus communication (pmbus compliant) ? output voltage and current protection ? internal non-volatile memory (nvm) applications ? servers/storage equipment ? telecom/datacom equipment ? power supplies (memory, dsp, asic, fpga) current sense ldo temp sensor v (0,1) vmon mgn vr vdd pwml isena isenb power level shifter xtemp pwm i 2 c scl sda salrt sa (0,1) management en pg cfg flex ss ilim fc monitor controller v25 sync sgnd dgnd adc non- volatile memory vtrk vsen+/- ddc pwmh figure 1. block diagram may 23, 2011 fn6847.2 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2009-2011. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners.
zl2004-01 2 fn6847.2 may 23, 2011 pin configuration zl2004-01 (32 ld qfn) top view ordering information part number (notes 1, 4) part marking temp range (c) shipping container package tape & reel (pb-free) pkg. dwg. # zl2004alnn-01 (note 2) 2004-01 0 to +65 490 pieces 32 ld qfn l32.5x5d ZL2004ALNNT-01 (note 2) 2004-01 0 to +65 100 pieces 32 ld qfn l32.5x5d zl2004alnnt1-01 (note 2) 2004-01 0 to +65 1000 pieces 32 ld qfn l32.5x5d zl2004alnf-01 (note 3) 2004-01 0 to +65 490 pieces 32 ld qfn l32.5x5g zl2004alnft-01 (note 3) 2004-01 0 to +65 100 pieces 32 ld qfn l32.5x5g zl2004alnft1-01 (note 3) 2004-01 0 to +65 1000 pieces 32 ld qfn l32.5x5g notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ special pb-free material sets; molding compounds/die attach materials and nipdau plate - e4 termination finish, which is rohs compliant and compatible with both snpb and pb-free sold ering operations. intersil pb-fre e products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requir ements of ipc/jedec j std-020. 3. these intersil pb-free plastic packaged products employ specia l pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish, wh ich is rohs compliant and compatible with both snpb and pb-free soldering operation s). intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std -020. 4. for moisture sensitivity level (msl), please see device information page for zl2004-01 . for more information on msl please see techbrief tb363 . pg ss en cfg mgn ddc xtemp v25 fc v0 v1 vimon nc vrtk vsen+ vsen- dgnd sync sa0 sa1 ilim scl sda salrt vdd vr pwmh sgnd pwml isena isenb nc 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 32 31 30 29 28 27 26 25 9 10111213141516 exposed paddle connect to sgnd
zl2004-01 3 fn6847.2 may 23, 2011 pin descriptions pin symbol type (note 5) description 1 dgnd pwr digital ground. connect to low impedance ground plane. 2synci/o, m (note 6) clock synchronization input. used to set the frequency of the internal switch clock, to sync to an external clock or to output internal clock. 3 sa0 i, m serial address select pins. used to assign unique address for each in dividual device or to enable certain management features. 4sa1 5 ilim i, m current limit select. sets the over current threshold voltage for isena, isenb. 6 scl i/o serial clock. connect to extern al host and/or to other zl devices. 7 sda i/o serial data. connect to external host and/or to other zl devices. 8 salrt o serial alert. connect to external host if desired. 9 fc i loop compensation selection pin. 10 v0 i, m output voltage selection pins. used to set v out set-point and v out max. 11 v1 12 vmon i, m external voltage monitoring (can be used fo r external driver bias monitoring for power-good). 13, 17 nc no connect. 14 vtrk i tracking sense input. used to track an external voltage source. 15 vsen+ i differential output voltage sense feedback . connect to positive output regulation point. 16 vsen- i differential output voltage sense feedback . connect to negative output regulation point. 18 isenb i differential voltage input for current sensing. 19 isena i differential voltage input for current sensing. high voltage (dcr). 20 pwml o pwm gate low signal. 21 sgnd pwr connect to low impedance ground plane. internal connection to sgnd. 22 pwmh o pwm gate high signal. 23 vr pwr internal 5v reference used to power internal drivers. 24 vdd (note 7) pwr supply voltage. 25 v25 pwr internal 2.5v reference used to power internal circuitry. 26 xtemp i external temperature sensor input. co nnect to external 2n3904 (base emitter junction). 27 ddc i single wire ddc bus (current sharing, interdevice communication). 28 mgn i v out margin control. 29 cfg m configuration pin. used to control the switching ph ase offset, sequencing and other management features. 30 en i enable. active signal enables pwm switching. 31 ss i, m soft-start delay and ramp select. sets the delay from when en is asserted until the output voltage starts to ramp and the ramp time. 32 pg o power-good output. epad sgnd pwr exposed thermal pad. connect to low impe dance ground plane. internal connection to sgnd. notes: 5. i = input, o = output, pwr = powe r or ground. m = multi-mode pins. 6. the sync pin can be used as a logic pin, a clock input or a clock output. 7. v dd is measured internally and the value is used to modify the pwm loop gain.
zl2004-01 4 fn6847.2 may 23, 2011 absolute maximum ratings (note 8) thermal information dc supply voltage (vdd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 17v logic i/o voltage cfg, ddc, en, fc, flex, ilim, mgn, pg, sa (0,1) salrt, scl, sda, ss, sync, vmon, v (0,1) . . . . . . . . . . . . -0.3v to 6.5v analog input voltages vsen+, vsen-, vtrk, xtemp . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v isena, isenb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.5v to 6.5v mosfet drive reference (vr). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6.5v logic reference (v25). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 3v ground voltage differential (v dgnd - v sgnd ) dgnd, sgnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to +0.3v thermal resistance (typical) ja (c/w) jc (c/w) 32 ld qfn package (notes 9, 10) . . . . . . . 35 5 junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-55c to +150c storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-55c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/ pbfree/pb-freereflow.asp recommended operating conditions input supply voltage range, (v dd ). . . . . . . . . . . . . . . . . . . . . . . . . 8v to 10v output voltage range (v out ) . . . . . . . . . . . . . . . . . 0.9v to 1.1v, 1.0v (typ) operating frequency (f sw ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400khz typ operating ambient temperature . . . . . . . . . . . . . . . . . . . . . . 0c to +65c caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 8. all voltages are measured with respect to sgnd. 9. ja is measured in free air with the componen t mounted on a high effective thermal conduc tivity test board with ?direct attach? fe atures. see tech brief tb379 . 10. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. electrical specifications v dd = 8.6 v, v out = 1.0 v, t a = 0c to +65c unless otherwise noted. typical values are at t a = +25c. the following specifications describe the zl2004- 01 electrical specifications that differ from the zl2004. please refer to the zl20 04 data sheet for the full operating specification limits for the remaining functions not described herein. boldface limits apply over the operating temperature range, 0c to +65c. parameter conditions min (note 11) typ max (note 11) unit input and supply characteristics i dd supply current at f sw = 400khz gh no load, gl no load, misc_config[7] = 1 ?16 30 ma i dds shutdown current en = 0v no i 2 c/smbus activity ? 2 5 ma vr reference output voltage v dd > 6v, i vr < 50ma 4.5 5.2 5.7 v v25 reference output voltage v r > 3v, i v25 < 50ma 2.25 2.5 2.75 v output characteristics output voltage adjustment range v in > v out 0.9 ? 1.1 v output voltage setpoint accuracy (note 12) v in = 8.6v, v out = 1v t a = 0c to + 65c, i load = 0a to 40a -0.2 ? 0.2 % pmbus read_vout accuracy -1.0 - 1.0 % oscillator and switching characteristics switching frequency (note 13) sync pin floating or nvm configured for 400khz ? 400 ? khz switching frequency set-point accuracy - 5 ? 5 % fault protection characteristics uvlo threshold range configurable via i 2 c/smbus 2.85 ? 16 v notes: 11. compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 12. v out set-point measured at the terminatio n of the vsen+ and vsen- sense points. 13. the zl2004-01 has been optimized for operation at 400khz only. please consult the factory for requirements at other operatin g frequencies.
zl2004-01 5 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn6847.2 may 23, 2011 for additional products, see www.intersil.com/product_tree products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog signal processi ng functions. go to www.intersil.com/products for a complete list of intersil product families. *for a complete listing of applications, related documentation an d related parts, please see the respective device information page on intersil.com: zl2004-01 to report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff fits are available from our website at http://rel.intersil.com/reports/search.php revision history the revision history provided is for inform ational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest rev. date revision change 5/11/11 fn6847.2 on page 1: added ?related literature? on page 2: added following parts to ?ordering information?: zl2004alnn-01 zl2004alnf-01 zl2004alnft-01 zl2004alnft1-01 added lead finish note 3 for alnf parts. on page 4: updated note in min max column of ?electrical specif ications? table from "parameters with min and/or max limits are 100% tested at +25c, unless otherwis e specified. temperature limits established by characterization and are not production tested." to "com pliance to datasheet limits is assured by one or more methods: production test, characterization and/or design." on page 7: added ?package outline drawing? l32.5x5g for alnf parts. 4/9/10 fn6847.1 on page 4, changed max value from 5.5 to 5.7 for ?vr reference output voltage?. 3/23/10 converted to new intersil template. added spec to existing parameter on the device in electrical specifications table ?output characteristics?: pmbus read_vout accuracy -1.0 (min), 1.0 (max) %. changed temp range in ordering information from ?-40c to +85c? to ?0c to +65c? matching information in thermal information. added over-temp note and reference electrical spec ta ble min and max columns. a dded ordering information table, pin configuration and pin description table, pod, revision history and products information. updated pod l32.5x5d to latest released version. change to pod is as follows: updated pod to new standards by adding land pattern and moving dimensions from table onto drawing. 2/19/09 fn6847.0 assigned file number fn6847 to datasheet as this will be the first release with an intersil file number. replace d header and footer with intersil header and footer. up dated disclaimer information to read "intersil and it's subsidiaries including zilker labs, in c." no changes to datasheet content.
zl2004-01 6 fn6847.2 may 23, 2011 package outline drawing l32.5x5d 32 lead quad flat no-lead plastic package rev 1, 3/10 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 id entifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to asme y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view 17 25 24 8 1 5.00 a 5.00 b index area pin 1 6 (4x) 0.15 32 32x 0.40 0.10 4 a 32x 0.23 m 0.10 c b 16 9 4x 0.50 28x 3.5 6 pin #1 3 .50 max 0.90 see detail "x" seating plane 0.10 c c 0.08 c 0 . 2 ref c 0 . 05 max. 0 . 00 min. 5 ( 3.50 ) ( 4. 80 typ ) ( 28x 0 . 5 ) (32x 0 . 23 ) ( 32x 0 . 60) exp. dap index area
zl2004-01 7 fn6847.2 package outline drawing l32.5x5g 32 lead quad flat no-lead plastic package rev 0, 3/10 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 id entifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to asme y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view 17 25 24 8 1 5.00 a 5.00 b index area pin 1 6 (4x) 0.15 32 32x 0.40 0.10 4 a 32x 0.23 m 0.10 c b 16 9 4x 0.50 28x 3.5 6 pin #1 3 .50 max 1.00 see detail "x" seating plane 0.10 c c 0.08 c 0 . 2 ref c 0 . 05 max. 0 . 00 min. 5 ( 3.50 ) ( 4. 80 typ ) ( 28x 0 . 5 ) (32x 0 . 23 ) ( 32x 0 . 60) exp. dap index area
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